verilog-generator
Eriemon
Agent skill for Verilog-2001 RTL generation and FPGA design workflows.
GITHUB TOPIC
7projects include this topic
The "rtl" topic on GitHub groups 7 open-source projects in the DeepSeek Harness (DSH) ecosystem, led by verilog-generator with 277 GitHub stars. verilog-generator — Agent skill for Verilog-2001 RTL generation and FPGA design workflows. Every project here is indexed by DSH Universe with live GitHub data — stars, activity and install status — so you can compare and install directly.
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Exact GitHub Topic match
Eriemon
Agent skill for Verilog-2001 RTL generation and FPGA design workflows.
ireza7
Persian (Farsi) RTL fix for DeepSeek Harness: automatic per-paragraph direction for assistant answers, thinking cells, tool cells and question boxes
kfirsch
Hebrew RTL support for the DeepSeek Harness web UI: dominant-script block direction, bidi-safe input fields, and RTL-aware line navigation.
Mhmd7-7
Adds an RTL chat box direction control to the dsh web GUI.
MiRHaDi
Community Persian language pack and RTL support for DeepSeek Harness Web, with lifecycle and browser tests
qrandmaster
تعريب واجهة DeepSeek Harness ودعم الاتجاه من اليمين إلى اليسار: 64 نطاقاً و2953 مفتاحاً، مع ورقة اتجاهية (RTL) وتصحيحات تخطيط مبنية على قواعد التطبيق المشحونة.
SMSMy
Arabic for DeepSeek Harness: bidi-safe RTL rendering for mixed Arabic/English content plus a full Arabic UI language pack (3,228 strings)